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First 2D semiconductor FPGA achieves wafer-scale integration

Researchers at Fudan University have achieved a breakthrough by fabricating the first Field-Programmable Gate Array (FPGA) ...
IEEE

Equivalent Circuit Model for Simulating ESD Discharge Current in ESD Damage Test

Abstract: Electrostatic discharge (ESD) damage evaluation methods for common mode choke (CMC) and ESD suppression devices are standardized in IEC 62228-5 Annex E and Annex F, respectively. The ...
IEEE

Investigation of Optimum Gate Structures for 1.2-kV SiC MOSFETs by Analyzing Avalanche and Short-Circuit Withstanding Capabilities

Abstract: This work explored the optimum gate structures of 1.2-kV SiC MOSFETs by analyzing avalanche capabilities using unclamped inductive switching tests and short-circuit capabilities. It found ...